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https://www.synopsys.com/cgi-bin/verification/dsdla/docsdl/vcs-xprop-ds.pdf?file=vcs-xprop-ds.pdf
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http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase_rev1_1.pdf
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http://infocenter.arm.com/help/topic/com.arm.doc.arp0009a/Verilog_X_Bugs.pdf
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http://www.sutherland-hdl.com/papers/2001-SNUG-paper_Verilog-2000_standard.pdf
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https://www.edn.com/design/integrated-circuit-design/4440596/Best-design-practices-for-DFT
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http://webee.technion.ac.il/~ran/papers/Metastability-and-Synchronizers.IEEEDToct2011.pdf
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http://www.mrc.uidaho.edu/mrc/people/jff/EO_440/Handouts/Clock_Domains/sync_errors.pdf
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https://sutherland-hdl.com/papers/2006-SNUG-Boston_standard_gotchas_paper.pdf
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http://web.cse.msu.edu/~cse820/readings/sutherlandMicropipelinesTuring.pdf